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   1 /*
   2  * fiwix/kernel/boot.S
   3  *
   4  * Copyright 2018, Jordi Sanfeliu. All rights reserved.
   5  * Distributed under the terms of the Fiwix License.
   6  */
   7 
   8 #include <fiwix/const.h>
   9 
  10 #define ASM     1               /* GRUB stuff */
  11 #include <fiwix/multiboot.h>
  12 
  13 #define CR0_MP  0x00000002      /* CR0 bit-01 MP (Monitor Coprocessor) */
  14 #define CR0_NE  0x00000020      /* CR0 bit-05 NE (Numeric Error) */
  15 #define CR0_WP  0x00010000      /* CR0 bit-16 WP (Write Protect) */
  16 #define CR0_AM  0x00040000      /* CR0 bit-18 AM (Alignment Mask) */
  17 #define CR0_PG  0x80000000      /* CR0 bit-31 PG (Paging) */
  18 
  19 .section .setup, "a"            /* "a" attribute means Allocatable section */
  20 
  21 .align 4
  22 tmp_gdtr:
  23         .word ((3 * 8) - 1)
  24         .long tmp_gdt
  25 
  26 .align 4
  27 tmp_gdt:
  28         /* NULL DESCRIPTOR */
  29         .word   0x0000
  30         .word   0x0000
  31         .word   0x0000
  32         .word   0x0000
  33 
  34         /* KERNEL CODE */
  35         .word   0xFFFF          /* segment limit 15-00 */
  36         .word   0x0000          /* base address 15-00 */
  37         .byte   0x00            /* base address 23-16 */
  38         .byte   0x9A            /* P=1 DPL=00 S=1 TYPE=1010 (exec/read) */
  39         .byte   0xCF            /* G=1 DB=1 0=0 AVL=0 SEGLIM=1111 */
  40         .byte   0x40            /* base address 31-24 */
  41 
  42         /* KERNEL DATA */
  43         .word   0xFFFF          /* segment limit 15-00 */
  44         .word   0x0000          /* base address 15-00 */
  45         .byte   0x00            /* base address 23-16 */
  46         .byte   0x92            /* P=1 DPL=00 S=1 TYPE=0010 (read/write) */
  47         .byte   0xCF            /* G=1 DB=1 0=0 AVL=0 SEGLIM=1111 */
  48         .byte   0x40            /* base address 31-24 */
  49 
  50 
  51 .text
  52 
  53 .globl start; start:
  54         cli
  55         jmp     multiboot_entry
  56 
  57 .align 4
  58 multiboot_header:                       /* multiboot header */
  59         .long   MULTIBOOT_HEADER_MAGIC  /* magic */
  60         .long   MULTIBOOT_HEADER_FLAGS  /* flags */
  61         /* checksum */
  62         .long   -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
  63 
  64 #ifndef __ELF__
  65         .long   multiboot_header        /* header_addr */
  66         .long   _start                  /* load_addr */
  67         .long   _edata                  /* load_end_addr */
  68         .long   _end                    /* bss_end_addr */
  69         .long   multiboot_entry         /* entry_addr */
  70 #endif /* ! __ELF__ */
  71 
  72 /*
  73  * We use the CX register in order to keep intact the values in AX and BX
  74  * registers, since they are holding the Multiboot values 'magic' and 'info'
  75  * respectively.
  76  */
  77 multiboot_entry:
  78         lgdt    tmp_gdtr                /* load GDTR with the temporary GDT */
  79         movw    $KERNEL_DS, %cx
  80         movw    %cx, %ds
  81         movw    %cx, %es
  82         movw    %cx, %fs
  83         movw    %cx, %gs
  84         movw    %cx, %ss
  85         ljmp    $KERNEL_CS, $1f
  86 1:
  87 
  88 
  89 /*
  90  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING !!!
  91  * ---------------------------------------------------------------------------
  92  * The minimal page directory of 4MB only works if the in-memory size of the
  93  * kernel is lesser than 3MB. If you need more space go to the setup_minmem()
  94  * function and set the 'mb4' variable accordingly.
  95  *
  96  * In order to know the current size of the Fiwix kernel, just follow this:
  97  *
  98  * # readelf -l fiwix
  99  *   Elf file type is EXEC (Executable file)
 100  *   Entry point 0xc0100020
 101  *   There are 2 program headers, starting at offset 52
 102  *
 103  *   Program Headers:
 104  *     Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
 105  *     LOAD           0x000074 0x00100000 0x00100000 0x00020 0x00020 R   0x4
 106  *     LOAD           0x0000a0 0xc0100020 0x00100020 0x33f8c 0x859a0 RWE 0x20
 107  *                                      check this value --> ^^^^^^^
 108  */
 109         movl    $0xC0010000, %esp       /* default stack address */
 110         pushl   $0                      /* reset EFLAGS */
 111         popf
 112 
 113         pushl   %eax                    /* save Multiboot magic value */
 114         call    setup_minmem            /* setup a minimal page directory */
 115         movl    %eax, %cr3
 116 
 117         movl    %cr0, %eax
 118         andl    $0x00000011, %eax       /* disable all, preserve ET & PE (GRUB) */
 119         orl     $CR0_PG, %eax           /* enable PG (Paging) */
 120         orl     $CR0_AM, %eax           /* enable AM (Alignment Mask) */
 121         orl     $CR0_WP, %eax           /* enable WP (Write Protect) */
 122         orl     $CR0_NE, %eax           /* enable NE (Numeric Error) */
 123         orl     $CR0_MP, %eax           /* enable MP (Monitor Coprocessor) */
 124         movl    %eax, %cr0
 125 
 126         call    bss_init                /* initialize BSS segment */
 127         call    gdt_init                /* setup and load the definitive GDT */
 128 
 129         pushl   %ebx                    /* save Multiboot info structure */
 130         call    get_last_boot_addr
 131         add     $4, %esp
 132         popl    %ecx                    /* restore Multiboot magic value */
 133         andl    $0xFFFFF000, %eax       /* page aligned */
 134         addl    $0x3000, %eax           /* 2 whole pages for kernel stack */
 135         subl    $4, %eax
 136         movl    %eax, %esp              /* set kernel stack */
 137 
 138         pushl   %esp                    /* save kernel stack address */
 139         pushl   %ebx                    /* save Multiboot info structure */
 140         pushl   %ecx                    /* save Multiboot magic value */
 141         call    start_kernel
 142 
 143 .align 4
 144 .globl cpu_idle; cpu_idle:
 145         hlt
 146         jmp     cpu_idle
 147 
 148 .align 4
 149 .org 0x1000
 150 .globl  _fdc_transfer_area
 151 _fdc_transfer_area:     .fill 512*2*18,1,0

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